Sciweavers

4 search results - page 1 / 1
» Interpolation of depth-3 arithmetic circuits with two multip...
Sort
View
STOC
2007
ACM
133views Algorithms» more  STOC 2007»
14 years 3 months ago
Interpolation of depth-3 arithmetic circuits with two multiplication gates
In this paper we consider the problem of constructing a small arithmetic circuit for a polynomial for which we have oracle access. Our focus is on n-variate polynomials, over a fi...
Amir Shpilka
COCO
2009
Springer
96views Algorithms» more  COCO 2009»
13 years 10 months ago
Reconstruction of Generalized Depth-3 Arithmetic Circuits with Bounded Top Fan-in
In this paper we give reconstruction algorithms for depth-3 arithmetic circuits with k multiplication gates (also known as ΣΠΣ(k) circuits), where k = O(1). Namely, we give an ...
Zohar Shay Karnin, Amir Shpilka
ECCC
2011
223views ECommerce» more  ECCC 2011»
12 years 10 months ago
A Case of Depth-3 Identity Testing, Sparse Factorization and Duality
Polynomial identity testing (PIT) problem is known to be challenging even for constant depth arithmetic circuits. In this work, we study the complexity of two special but natural ...
Chandan Saha, Ramprasad Saptharishi, Nitin Saxena
TC
1998
13 years 3 months ago
Multiple-Valued Signed-Digit Adder Using Negative Differential-Resistance Devices
—This paper describes a new signed-digit full adder (SDFA) circuit consisting of resonant-tunneling diodes (RTDs) and metal-oxide semiconductor field effect transistors (MOSFETs)...
Alejandro F. González, Pinaki Mazumder