4 search results - page 1 / 1 » Latency-tolerant software pipelining in a production compile... |
IPPS
2000
IEEE
13 years 9 months ago
2000
IEEE
As the speed gap between CPU and memory widens, memory hierarchy has become the primary factor limiting program performance. Until now, the principal focus of hardware and softwar...
MICRO
2005
IEEE
13 years 10 months ago
2005
IEEE
Until recently, a steadily rising clock rate and other uniprocessor microarchitectural improvements could be relied upon to consistently deliver increasing performance for a wide ...
CGO
2008
IEEE
13 years 11 months ago
2008
IEEE
In this paper we investigate the benefit of scheduling non-critical loads for a higher latency during software pipelining. "Noncritical" denotes those loads that have s...
CGO
2004
IEEE
13 years 8 months ago
2004
IEEE
Predicated execution enables the removal of branches by converting segments of branching code into sequences of conditional operations. An important side effect of this transforma...