37 search results - page 1 / 8 » Leakage Current Reduction in VLSI Systems |
JCSC
2002
13 years 3 months ago
2002
There is a growing need to analyze and optimize the stand-by component of power in digital circuits designed for portable and battery-powered applications. Since these circuits re...
TIM
2010
12 years 11 months ago
2010
In this paper, a novel low-power design technique is proposed to minimize the standby leakage power in nanoscale CMOS very large scale integration (VLSI) systems by generating the ...
ICCD
2007
IEEE
14 years 1 months ago
2007
IEEE
In this paper, we propose a novel on-chip voltage drop reduction technique for on-chip power delivery networks of VLSI systems in the presence of variational leakage current sourc...
IPC
2007
IEEE
13 years 10 months ago
2007
IEEE
GLVLSI
2007
IEEE
13 years 10 months ago
2007
IEEE
Leakage power dissipation is one of the most critical factors for the overall current dissipation and future designs. However, design techniques for the reduction of leakage power...