137 search results - page 1 / 28 » Leakage power modeling and reduction with data retention |
ICCAD
2002
IEEE
14 years 1 months ago
2002
IEEE
ISQED
2008
IEEE
13 years 11 months ago
2008
IEEE
SRAM leakage power dominates the total power of low duty-cycle applications, e.g., sensor nodes. Accordingly, leakage power reduction during data-retention in SRAM standby is ofte...
DAC
2002
ACM
14 years 5 months ago
2002
ACM
In this paper we propose a novel integrated circuit and architectural level technique to reduce leakage power consumption in high performance cache memories using single Vt (trans...
ISCAS
2007
IEEE
13 years 10 months ago
2007
IEEE
Abstract— We study leakage-power reduction in standby random access memories (SRAMs) during data-retention. An SRAM cell requires a minimum critical supply voltage (DRV) above wh...
ISLPED
2005
ACM
13 years 10 months ago
2005
ACM
SRAM leakage constitutes a significant portion of the standby power budget of modern SoC products for handheld applications such as PDA and cellular phones. NMOS and PMOS reverse ...