Sciweavers

3 search results - page 1 / 1
» LegUp: high-level synthesis for FPGA-based processor acceler...
Sort
View
FPGA
2011
ACM
401views FPGA» more  FPGA 2011»
12 years 7 months ago
LegUp: high-level synthesis for FPGA-based processor/accelerator systems
In this paper, we introduce a new open source high-level synthesis tool called LegUp that allows software techniques to be used for hardware design. LegUp accepts a standard C pro...
Andrew Canis, Jongsok Choi, Mark Aldham, Victor Zh...
SASP
2008
IEEE
183views Hardware» more  SASP 2008»
13 years 10 months ago
Application Acceleration with the Explicitly Parallel Operations System - the EPOS Processor
Different approaches have been proposed over the years for automatically transforming High-Level-Languages (HLL) descriptions of applications into custom hardware implementations. ...
Alexandros Papakonstantinou, Deming Chen, Wen-mei ...
FCCM
2011
IEEE
220views VLSI» more  FCCM 2011»
12 years 8 months ago
Reducing the Energy Cost of Irregular Code Bases in Soft Processor Systems
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...
Manish Arora, Jack Sampson, Nathan Goulding-Hotta,...