915 search results - page 1 / 183 » Level Shifter Design for Low Power Applications |
CORR
2010
Springer
13 years 4 months ago
2010
Springer
With scaling of Vt sub-threshold leakage power is increasing and expected to become significant part of total power consumption.In present work three new configurations of level s...
DAC
2003
ACM
14 years 5 months ago
2003
ACM
Power dissipation is becoming the most challenging design constraint in nanometer technologies. Among various design implementation schemes, standard cell ASICs offer the best pow...
ASPDAC
2007
ACM
13 years 8 months ago
2007
ACM
Using multiple supply voltages on a SoC design is an efficient way to achieve low power. However, it may lead to a complex power network and a huge number of level shifters if we j...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
When a signal traverses on-chip voltage domains, a level shifter is required. Inverters can handle a high to low voltage shift with minimal leakage. For a low to high voltage leve...
DAC
1999
ACM
14 years 5 months ago
1999
ACM
We present a novel approach that minimizes the power consumption of embedded core-based systems through hardware/software partitioning. Our approach is based on the idea of mapping...