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DATE
2007
IEEE
109views Hardware» more  DATE 2007»
14 years 2 days ago
System level clock tree synthesis for power optimization
The clock tree is the interconnect net on Systems-on-Chip (SoCs) with the heaviest load and consumes up to 40% of the overall power budget. Substantial savings of the overall powe...
Saif Ali Butt, Stefan Schmermbeck, Jurij Rosenthal...
CORR
2008
Springer
120views Education» more  CORR 2008»
13 years 5 months ago
A new distance for high level RNA secondary structure comparison
We describe an algorithm for comparing two RNA secondary structures coded in the form of trees that introduces two new operations, called node fusion and edge fusion, besides the t...
Julien Allali, Marie-France Sagot
ECML
2007
Springer
13 years 12 months ago
Clustering Trees with Instance Level Constraints
Abstract. Constrained clustering investigates how to incorporate domain knowledge in the clustering process. The domain knowledge takes the form of constraints that must hold on th...
Jan Struyf, Saso Dzeroski
JCO
2006
66views more  JCO 2006»
13 years 5 months ago
Tree edge decomposition with an application to minimum ultrametric tree approximation
A k-decomposition of a tree is a process in which the tree is recursively partitioned into k edge-disjoint subtrees until each subtree contains only one edge. We investigated the p...
Chia-Mao Huang, Bang Ye Wu, Chang-Biau Yang
GD
2009
Springer
13 years 10 months ago
On the Characterization of Level Planar Trees by Minimal Patterns
We consider characterizations of level planar trees. Healy et al. [8] characterized the set of trees that are level planar in terms of two minimal level non-planar (MLNP) patterns....
Alejandro Estrella-Balderrama, J. Joseph Fowler, S...