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» Lightweight predication support for out of order processors
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MICRO
2007
IEEE
168views Hardware» more  MICRO 2007»
13 years 11 months ago
Global Multi-Threaded Instruction Scheduling
Recently, the microprocessor industry has moved toward chip multiprocessor (CMP) designs as a means of utilizing the increasing transistor counts in the face of physical and micro...
Guilherme Ottoni, David I. August
ISPASS
2007
IEEE
13 years 11 months ago
PTLsim: A Cycle Accurate Full System x86-64 Microarchitectural Simulator
In this paper, we introduce PTLsim, a cycle accurate full system x86-64 microprocessor simulator and virtual machine. PTLsim models a modern superscalar out of order x86-64 proces...
Matt T. Yourst
EWSPT
2003
Springer
13 years 10 months ago
Providing Highly Automated and Generic Means for Software Deployment Process
We present a new approach for the management and enactment of deployment process by a deployment processor ORYA (Open enviRonment to deploY Applications). ORYA aims to integrate te...
Vincent Lestideau, Noureddine Belkhatir
DATE
2007
IEEE
114views Hardware» more  DATE 2007»
13 years 11 months ago
Mapping the physical layer of radio standards to multiprocessor architectures
We are concerned with the software implementation of baseband processing for the physical layer of radio standards (“Software Defined Radio - SDR”). Given the constraints for ...
Cyprian Grassmann, Mathias Richter, Mirko Sauerman...