10 search results - page 1 / 2 » Limits on voltage scaling for caches utilizing fault toleran... |
ICCD
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper proposes a new low power cache architecture that utilizes fault tolerance to allow aggressively reduced voltage levels. The fault tolerant overhead circuits consume lit...
DSD
2007
IEEE
13 years 8 months ago
2007
IEEE
In this study, we investigate different cache fault tolerance techniques to determine which will be most effective when on-chip memory cell defect probabilities exceed those of cu...
MICRO
2009
IEEE
13 years 11 months ago
2009
IEEE
Voltage scaling is one of the most effective mechanisms to reduce microprocessor power consumption. However, the increased severity of manufacturing-induced parameter variations a...
ISLPED
2009
ACM
13 years 11 months ago
2009
ACM
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
CODES
2007
IEEE
13 years 10 months ago
2007
IEEE
In this paper we present an approach to the scheduling and voltage scaling of low-power fault-tolerant hard real-time applications mapped on distributed heterogeneous embedded sys...