162 search results - page 2 / 33 » Load Latency Tolerance in Dynamically Scheduled Processors |
HPCA
2000
IEEE
13 years 9 months ago
2000
IEEE
We consider a variety of dynamic, hardware-based methods for exploiting load/store parallelism, including mechanisms that use memory dependence speculation. While previous work ha...
CCGRID
2001
IEEE
13 years 9 months ago
2001
IEEE
The Information Power Grid (IPG) concept developed by NASA is aimed to provide a metacomputing platform for large-scale distributed computations, by hiding the intricacies of a hig...
ICDCS
1996
IEEE
13 years 9 months ago
1996
IEEE
Efficiently scheduling parallel tasks on to the processors of a shared-memory multiprocessor is critical to achieving high performance. Given perfect information at compile-time, ...
MICRO
2005
IEEE
13 years 10 months ago
2005
IEEE
Conventional processors use a fully-associative store queue (SQ) to implement store-load forwarding. Associative search latency does not scale well to capacities and bandwidths re...
ICDE
2005
IEEE
14 years 6 months ago
2005
IEEE
Distributed and parallel computing environments are becoming cheap and commonplace. The availability of large numbers of CPU's makes it possible to process more data at highe...