59 search results - page 3 / 12 » Load Miss Prediction - Exploiting Power Performance Trade-of... |
DAC
2010
ACM
13 years 6 months ago
2010
ACM
This paper describes a fast, automated technique for accurate on-line estimation of the performance and power consumption of interacting processes in a multi-programmed, multi-cor...
IPPS
2007
IEEE
14 years 14 days ago
2007
IEEE
Snoopy cache coherence protocols broadcast requests to all nodes, reducing the latency of cache to cache transfer misses at the expense of increasing interconnect power. We propos...
JCM
2007
13 years 6 months ago
2007
—Divisible loads are those workloads that can be partitioned by a scheduler into any arbitrary chunks. The problem of scheduling divisible loads has been defined for a long time,...
DATE
2008
IEEE
14 years 19 days ago
2008
IEEE
—The contribution of memory latency to execution time continues to increase, and latency hiding mechanisms become ever more important for efficient processor design. While high-...
ICS
2003
Tsinghua U.
13 years 11 months ago
2003
Tsinghua U.
—The ever-increasing computational power of contemporary microprocessors reduces the execution time spent on arithmetic computations (i.e., the computations not involving slow me...