9 search results - page 2 / 2 » Loop recreation for thread-level speculation |
CGO
2008
IEEE
13 years 11 months ago
2008
IEEE
The recent trend in the processor industry of packing multiple processor cores in a chip has increased the importance of automatic techniques for extracting thread level paralleli...
PPOPP
2006
ACM
13 years 11 months ago
2006
ACM
As multi-core architectures with Thread-Level Speculation (TLS) are becoming better understood, it is important to focus on TLS compilation. TLS compilers are interesting in that,...
IWMM
2010
Springer
13 years 9 months ago
2010
Springer
With the availability of chip multiprocessor (CMP) and simultaneous multithreading (SMT) machines, extracting thread level parallelism from a sequential program has become crucial...
ICS
2005
Tsinghua U.
13 years 10 months ago
2005
Tsinghua U.
Chip Multiprocessors (CMPs) are flexible, high-frequency platforms on which to support Thread-Level Speculation (TLS). However, for TLS to deliver on its promise, CMPs must explo...