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VLSID
2006
IEEE
140views VLSI» more  VLSID 2006»
14 years 4 months ago
Low Power Multilevel Interconnect Networks Using Wave-Pipelined Multiplexed (WPM) Routing
A low power multilevel interconnect architecture that uses wave-pipelined multiplexed (WPM) interconnect routing is proposed in this paper. WPM takes advantage of existing interco...
Ajay Joshi, Vinita V. Deodhar, Jeffrey A. Davis
DSD
2007
IEEE
160views Hardware» more  DSD 2007»
13 years 11 months ago
Alternatives in Designing Level-Restoring Buffers for Interconnection Networks in Field-Programmable Gate Arrays
Programmable routing and logic in field-programmable gate arrays are implemented using nMOS pass transistors. Since the threshold voltage drop across an nMOS device degrades the ...
Scott Miller, Mihai Sima, Michael McGuire