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GLVLSI
1998
IEEE
134views VLSI» more  GLVLSI 1998»
11 years 5 months ago
Low-Power Design of Finite Field Multipliers for Wireless Applications
Amr G. Wassal, M. Anwarul Hasan, Mohamed I. Elmasr...
IEICET
2008
106views more  IEICET 2008»
11 years 1 months ago
Realization of Low Power High-Speed Channel Filters with Stringent Adjacent Channel Attenuation Specifications for Wireless Comm
Finite impulse response (FIR) filtering is the most computationally intensive operation in the channelizer of a wireless communication receiver. Higher order FIR channel filters a...
Jimson Mathew, R. Mahesh, A. Prasad Vinod, Edmund ...
VLSISP
1998
128views more  VLSISP 1998»
11 years 27 days ago
A Low Power DSP Engine for Wireless Communications
This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed speci´Čücally for next generation wire...
Ingrid Verbauwhede, Mihran Touriguian
CDES
2006
240views Hardware» more  CDES 2006»
11 years 2 months ago
Design of Low Power 4-Tap 8-Bit Adiabatic FIR Filter
Abstract-- Digital signal processing (DSP) is used to perform filtering, decimation and down conversion in common communications systems, like in oversampling analog to digital con...
Arun N. Chandorkar, Gurvinder Singh
KES
2005
Springer
11 years 6 months ago
Reconfigurable Power-Aware Scalable Booth Multiplier
Abstract. An energy-efficient power-aware design is highly desirable for digital signal processing functions that encounter a wide diversity of operating scenarios in battery-power...
Hanho Lee
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