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» Low-power bus encoding using an adaptive hybrid algorithm
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DAC
2006
ACM
11 years 13 days ago
Low-power bus encoding using an adaptive hybrid algorithm
In this paper, we propose an adaptive low-power bus encoding algorithm based on weighted code mapping (WCM) and the delayed bus technique. The WCM algorithm transforms an original...
Avnish R. Brahmbhatt, Jingyi Zhang, Qing Wu, Qinru...
AHS
2007
IEEE
349views Hardware» more  AHS 2007»
10 years 5 months ago
A Low Power Implementation of H.264 Adaptive Deblocking Filter Algorithm
In this paper, we present a low power implementation of H.264 adaptive deblocking filter (DBF) algorithm on ARM Versatile / PB926EJ-S Development Board. The DBF hardware is implem...
Mustafa Parlak, Ilker Hamzaoglu
ISLPED
2000
ACM
111views Hardware» more  ISLPED 2000»
10 years 3 months ago
Low power techniques and design tradeoffs in adaptive FIR filtering for PRML read channels
In this paper, we describe area and power reduction techniques for a low-latency adaptive finite-impulse response filter for magnetic recording read channel applications. Variou...
Khurram Muhammad, Robert B. Staszewski, Poras T. B...
ISCAS
2003
IEEE
79views Hardware» more  ISCAS 2003»
10 years 4 months ago
Design of a low power psycho-acoustic model co-processor for MPEG-2/4 AAC LC stereo encoder
A new design of Psycho-Acoustic Model in MPEG-214 AAC encoding is proposed. Differing from the conventional PC-based and DSP-based encoders, it was based on hybrid architectures. ...
Tsung-Han Tsai, Shih-Way Huang, Liang-Gee Chen
CASES
2003
ACM
10 years 4 months ago
Power efficient encoding techniques for off-chip data buses
Reducing the power consumption of computing devices has gained a lot of attention recently. Many research works have focused on reducing power consumption in the off-chip buses as...
Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Wa...
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