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ISCAS
2005
IEEE
167views Hardware» more  ISCAS 2005»
13 years 10 months ago
Low-power log-MAP turbo decoding based on reduced metric memory access
Due to the powerful error correcting performance, turbo codes have been adopted in many wireless communication standards. Although several low-power techniques have been proposed,...
Dong-Soo Lee, In-Cheol Park
ISCAS
2006
IEEE
74views Hardware» more  ISCAS 2006»
13 years 10 months ago
Low-power hybrid turbo decoding based on reverse calculation
—As turbo decoding is a highly memory-intensive algorithm consuming large power, a major issue to be solved in practical implementation is to reduce power consumption. This paper...
Hye-Mi Choi, Ji-Hoon Kim, In-Cheol Park
ISCAS
2007
IEEE
109views Hardware» more  ISCAS 2007»
13 years 10 months ago
Energy-Efficient Double-Binary Tail-Biting Turbo Decoder Based on Border Metric Encoding
—This paper presents an energy-efficient turbo decoder based on border metric encoding, which is especially suitable for non-binary circular turbo codes. In the proposed method, ...
Ji-Hoon Kim, In-Cheol Park
SIPS
2006
IEEE
13 years 10 months ago
Low Power Trellis Decoder with Overscaled Supply Voltage
Abstract— This paper is interested in applying voltage overscaling (VOS) to reduce trellis decoder energy consumption, where the key issue is how to minimize the decoding perform...
Yang Liu, Tong Zhang, Jiang Hu
ISLPED
1998
ACM
84views Hardware» more  ISLPED 1998»
13 years 8 months ago
Low power architecture of the soft-output Viterbi algorithm
CT This paper investigates the low power implementation issues of the soft-output Viterbi algorithm (SOVA), a building block for turbo codes. By briefly explaining the theory of t...
David Garrett, Mircea R. Stan