20 search results - page 2 / 4 » MPC-MPI: An MPI Implementation Reducing the Overall Memory C... |
HPCA
2012
IEEE
12 years 27 days ago
2012
IEEE
Modern memory systems rely on spatial locality to provide high bandwidth while minimizing memory device power and cost. The trend of increasing the number of cores that share memo...
ISCAS
2003
IEEE
13 years 10 months ago
2003
IEEE
— The authors present a number of complete cores which are specially tailored for the low power implementation of FIR filters executed using block processing. The paper reveals t...
CONCURRENCY
2010
13 years 5 months ago
2010
Over the past decade the number of processors in the high performance facilities went up to hundreds of thousands. As a direct consequence, while the computational power follow th...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
Extending 2-D planar topologies in integrated circuits (ICs) to a 3-D implementation has the obvious benefits of reducing the overall footprint and average interconnection length,...
SC
2005
ACM
13 years 11 months ago
2005
ACM
On SMP clusters, mixed mode collective MPI communications, which use shared memory communications within SMP nodes and point-to-point communications between SMP nodes, are more eï...