41 search results - page 1 / 9 » Mapping DSP applications on processor systems with coarse-gr... |
IPPS
2006
IEEE
13 years 10 months ago
2006
IEEE
In this paper, we present performance results from mapping five real-world DSP applications on an embedded system-on-chip that incorporates coarse-grain reconfigurable logic with ...
VLSISP
2008
13 years 4 months ago
2008
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
FPL
2004
Springer
13 years 9 months ago
2004
Springer
A high-performance reconfigurable coarse-grain data-path, part of a hybrid reconfigurable platform, is introduced. The data-path consists of coarse grain components that their flex...
ASAP
2005
IEEE
13 years 10 months ago
2005
IEEE
In this paper, we propose a hardware/software partitioning method for improving applications’ performance in embedded systems. Critical software parts are accelerated on hardwar...
ASAP
2005
IEEE
13 years 10 months ago
2005
IEEE
It is widely known that parallel operation execution in multiprocessor systems generates a respective increase in memory accesses. Since the memory and bus subsystems provide a li...