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DDECS
2007
IEEE
121views Hardware» more  DDECS 2007»
13 years 11 months ago
March CRF: an Efficient Test for Complex Read Faults in SRAM Memories
: In this paper we study Complex Read Faults in SRAMs, a combination of various malfunctions that affect the read operation in nanoscale memories. All the memory elements involved ...
Luigi Dilillo, Bashir M. Al-Hashimi
DATE
2006
IEEE
108views Hardware» more  DATE 2006»
13 years 11 months ago
Automatic march tests generations for static linked faults in SRAMs
Static Linked Faults are considered an interesting class of memory faults. Their capability of influencing the behavior of other faults causes the hiding of the fault effect and m...
Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Gi...
DATE
1998
IEEE
106views Hardware» more  DATE 1998»
13 years 9 months ago
March Tests for Word-Oriented Memories
Most memory test algorithms are optimized tests for a particular memory technology and a particular set of fault models, under the assumption that the memory is bit-oriented; i.e....
A. J. van de Goor, Issam B. S. Tlili
DFT
1999
IEEE
119views VLSI» more  DFT 1999»
13 years 9 months ago
RAMSES: A Fast Memory Fault Simulator
In this paper, we present a memory fault simulator called the Random Access Memory Simulator for Error Screening (RAMSES). Although it was designed based on some wellknown memory ...
Chi-Feng Wu, Chih-Tsun Huang, Cheng-Wen Wu
ISCA
2010
IEEE
336views Hardware» more  ISCA 2010»
13 years 9 months ago
Reducing cache power with low-cost, multi-bit error-correcting codes
Technology advancements have enabled the integration of large on-die embedded DRAM (eDRAM) caches. eDRAM is significantly denser than traditional SRAMs, but must be periodically r...
Chris Wilkerson, Alaa R. Alameldeen, Zeshan Chisht...