20 search results - page 1 / 4 » Massively multi-topology sizing of analog integrated circuit... |
DAC
2007
ACM
13 years 8 months ago
2007
ACM
This paper presents MOJITO, a system which optimizes across thousands of analog circuit topologies simultaneously, and returns a set of sized topologies that collectively provide ...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
This paper demonstrates a system that performs multiobjective sizing across 100,000 analog circuit topologies simultaneously, with SPICE accuracy. It builds on a previous system, ...
ICCAD
2001
IEEE
14 years 1 months ago
2001
IEEE
This paper presents the sizing rules method for analog CMOS circuit design that consists of: first, the development of a hierarchical library of transistor pair groups as basic b...
ICCAD
2001
IEEE
14 years 1 months ago
2001
IEEE
This paper presents a method to automatically generate posynomial response surface models for the performance parameters of analog integrated circuits. The posynomial models enabl...
DATE
2002
IEEE
13 years 9 months ago
2002
IEEE
In this paper, a method for nominal design of analog integrated circuits is presented that includes process variations and operating ranges by worst-case parameter sets. These set...