39 search results - page 7 / 8 » Matrix Multiplication on Two Interconnected Processors |
ICPP
1993
IEEE
13 years 9 months ago
1993
IEEE
:. In designing application-specific bit-level architectures and in programming existing bit-level processor arrays, it is necessary to expand a word-level algorithm into its bit-...
DATE
2010
IEEE
13 years 3 months ago
2010
IEEE
— Applications like 4G baseband modem require single-chip implementation to meet the integration and power consumption requirements. These applications demand a high computing pe...
BMCBI
2011
12 years 8 months ago
2011
Background: The Smith-Waterman algorithm for local sequence alignment is more sensitive than heuristic methods for database searching, but also more time-consuming. The fastest ap...
ISPASS
2009
IEEE
14 years 1 days ago
2009
IEEE
Modern Graphic Processing Units (GPUs) provide sufficiently flexible programming models that understanding their performance can provide insight in designing tomorrow’s manyco...
MICRO
2006
IEEE
13 years 11 months ago
2006
IEEE
3D die stacking is an exciting new technology that increases transistor density by vertically integrating two or more die with a dense, high-speed interface. The result of 3D die ...