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RTSS
2003
IEEE
13 years 10 months ago
Data Caches in Multitasking Hard Real-Time Systems
Data caches are essential in modern processors, bridging the widening gap between main memory and processor speeds. However, they yield very complex performance models, which make...
Xavier Vera, Björn Lisper, Jingling Xue
IMC
2009
ACM
13 years 11 months ago
Sampling biases in network path measurements and what to do about it
We show that currently prevalent practices for network path measurements can produce inaccurate inferences because of sampling biases. The inferred mean path latency can be more t...
Srikanth Kandula, Ratul Mahajan
CODES
2007
IEEE
13 years 11 months ago
Compile-time decided instruction cache locking using worst-case execution paths
Caches are notorious for their unpredictability. It is difficult or even impossible to predict if a memory access results in a definite cache hit or miss. This unpredictability i...
Heiko Falk, Sascha Plazar, Henrik Theiling
TIP
2008
95views more  TIP 2008»
13 years 5 months ago
Optimization of Packetization Masks for Image Coding Based on an Objective Cost Function for Desired Packet Spreading
In image communication over lossy packet networks (e.g., cell phone communication) packet loss errors lead to damaged images. Damaged images can be repaired with passive error conc...
Joost Rombaut, Aleksandra Pizurica, Wilfried Phili...
LCTRTS
2007
Springer
13 years 11 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...