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ISCA
2006
IEEE
133views Hardware» more  ISCA 2006»
13 years 11 months ago
TRAP-Array: A Disk Array Architecture Providing Timely Recovery to Any Point-in-time
RAID architectures have been used for more than two decades to recover data upon disk failures. Disk failure is just one of the many causes of damaged data. Data can be damaged by...
Qing Yang, Weijun Xiao, Jin Ren
LCTRTS
2007
Springer
13 years 11 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
13 years 5 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
CPHYSICS
2008
96views more  CPHYSICS 2008»
13 years 5 months ago
Moment distributions of clusters and molecules in the adiabatic rotor model
We present a Fortran program to compute the distribution of dipole moments of free particles for use in analyzing molecular beams experiments that measure moments by deflection in...
G. E. Ballentine, G. F. Bertsch, N. Onishi, K. Yab...
ATAL
2008
Springer
13 years 7 months ago
Simulating human behaviors in agent societies
As increasing numbers of processors and agents pervade the human environment, societies comprising both humans and agents will emerge. Presently, it is unknown how a person might ...
Alicia Ruvinsky, Michael N. Huhns