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» MemSpy: Analyzing Memory System Bottlenecks in Programs
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VALUETOOLS
2006
ACM
167views Hardware» more  VALUETOOLS 2006»
13 years 11 months ago
Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialities
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
Jie Tao, Wolfgang Karl
IPPS
2010
IEEE
13 years 3 months ago
Dynamic analysis of the relay cache-coherence protocol for distributed transactional memory
Transactional memory is an alternative programming model for managing contention in accessing shared in-memory data objects. Distributed transactional memory (TM) promises to alle...
Bo Zhang, Binoy Ravindran
IPPS
2003
IEEE
13 years 10 months ago
Quantifying Locality Effect in Data Access Delay: Memory logP
The application of hardware-parameterized models to distributed systems can result in omission of key bottlenecks such as the full cost of inter-node communication in a shared mem...
Kirk W. Cameron, Xian-He Sun
PASTE
2004
ACM
13 years 10 months ago
Validation of assembler programs for DSPs: a static analyzer
Digital Signal Processors are widely used in critical embedded systems to pilot low-level, often critical functionalities. We describe a static analyzer based on abstract interpre...
Matthieu Martel
IPPS
1999
IEEE
13 years 9 months ago
A Factorial Performance Evaluation for Hierarchical Memory Systems
In this study, we introduce an evaluation methodology for advanced memory systems. This methodology is based on statistical factorial analysis. It is two fold: it first determines...
Xian-He Sun, Dongmei He, Kirk W. Cameron, Yong Luo