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» Memory Dependence Prediction Using Store Sets
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ISCA
1995
IEEE
109views Hardware» more  ISCA 1995»
13 years 9 months ago
Next Cache Line and Set Prediction
Accurate instruction fetch and branch prediction is increasingly important on today’s wide-issue architectures. Fetch prediction is the process of determining the next instructi...
Brad Calder, Dirk Grunwald
MICRO
1999
IEEE
136views Hardware» more  MICRO 1999»
13 years 10 months ago
Read-After-Read Memory Dependence Prediction
: We identify that typical programs exhibit highly regular read-after-read (RAR) memory dependence streams. We exploit this regularity by introducing read-after-read (RAR) memory d...
Andreas Moshovos, Gurindar S. Sohi
MICRO
1998
IEEE
92views Hardware» more  MICRO 1998»
13 years 10 months ago
Predictive Techniques for Aggressive Load Speculation
Load latency remains a significant bottleneck in dynamically scheduled pipelined processors. Load speculation techniques have been proposed to reduce this latency. Dependence Pred...
Glenn Reinman, Brad Calder
ICS
2005
Tsinghua U.
13 years 11 months ago
Reducing latencies of pipelined cache accesses through set prediction
With the increasing performance gap between the processor and the memory, the importance of caches is increasing for high performance processors. However, with reducing feature si...
Aneesh Aggarwal
CSMR
2010
IEEE
13 years 22 days ago
Does the Past Say It All? Using History to Predict Change Sets in a CMDB
To avoid unnecessary maintenance costs in large IT systems resulting from poorly planned changes, it is essential to manage and control changes to the system and to verify that all...
Sarah Nadi, Richard C. Holt, Serge Mankovski