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ASPLOS
2011
ACM
11 years 9 months ago
2011
ACM
New storage-class memory (SCM) technologies, such as phasechange memory, STT-RAM, and memristors, promise user-level access to non-volatile storage through regular memory instruct...
CORR
2011
Springer
11 years 9 months ago
2011
Springer
Modern high-end machines feature multiple processor packages, each of which contains multiple independent cores and integrated memory controllers connected directly to dedicated p...
ICS
2003
Tsinghua U.
12 years 11 months ago
2003
Tsinghua U.
Recent work in low-latency, high-bandwidth communication systems has resulted in building user–level Network InControllers (NICs) and communication abstractions that support dir...
DAC
2002
ACM
13 years 7 months ago
2002
ACM
Previous work on DRAM power-mode management focused on hardware-based techniques and compiler-directed schemes to explicitly transition unused memory modules to low-power operatin...
ICS
2009
Tsinghua U.
13 years 22 days ago
2009
Tsinghua U.
The Cell BE is a multicore processor with eight vector accelerators (called SPEs) that implement explicit cache management through direct memory access engines. While the Cell has...
