276 search results - page 2 / 56 » Memory Organization for Improved Data Cache Performance in E... |
CODES
2001
IEEE
13 years 8 months ago
2001
IEEE
This paper explores an application-specific customization technique for the data cache, one of the foremost area/power consuming and performance determining microarchitectural fea...
ICS
2005
Tsinghua U.
13 years 10 months ago
2005
Tsinghua U.
We propose an organization for the on-chip memory system of a chip multiprocessor, in which 16 processors share a 16MB pool of 256 L2 cache banks. The L2 cache is organized as a n...
SEUS
2009
IEEE
13 years 11 months ago
2009
IEEE
Future embedded systems are expected to use chip-multiprocessors to provide the execution power for increasingly demanding applications. Multiprocessors increase the pressure on th...
CC
2003
Springer
13 years 10 months ago
2003
Springer
Cache memories were invented to decouple fast processors from slow memories. However, this decoupling is only partial, and many researchers have attempted to improve cache use by p...
SBACPAD
2004
IEEE
13 years 6 months ago
2004
IEEE
High-performance processors employ aggressive speculation and prefetching techniques to increase performance. Speculative memory references caused by these techniques sometimes br...