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ISCAS
2007
IEEE
136views Hardware» more  ISCAS 2007»
13 years 10 months ago
Flexible Low Power Probability Density Estimation Unit For Speech Recognition
— This paper describes the hardware architecture for a flexible probability density estimation unit to be used in a Large Vocabulary Speech Recognition System, and targeted for m...
Ullas Pazhayaveetil, Dhruba Chandra, Paul Franzon
CODES
2004
IEEE
13 years 8 months ago
Memory system design space exploration for low-power, real-time speech recognition
The recent proliferation of computing technology has brought added interest to natural I/O interface technologies such as speech recognition. Unfortunately, the computational and ...
Rajeev Krishna, Scott A. Mahlke, Todd M. Austin
DAC
2000
ACM
14 years 5 months ago
Code compression for low power embedded system design
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
Haris Lekatsas, Jörg Henkel, Wayne Wolf
CASES
2004
ACM
13 years 9 months ago
A low power architecture for embedded perception
Recognizing speech, gestures, and visual features are important interface capabilities for future embedded mobile systems. Unfortunately, the real-time performance requirements of...
Binu K. Mathew, Al Davis, Michael Parker
CODES
2004
IEEE
13 years 8 months ago
A loop accelerator for low power embedded VLIW processors
The high transistor density afforded by modern VLSI processes have enabled the design of embedded processors that use clustered execution units to deliver high levels of performan...
Binu K. Mathew, Al Davis