6 search results - page 1 / 2 » Memory-System Design Considerations for Dynamically-Schedule... |
ISCA
1997
IEEE
13 years 9 months ago
1997
IEEE
HPCA
1996
IEEE
13 years 9 months ago
1996
IEEE
We have investigated the register file requirements of dynamically scheduled processors using register renaming and dispatch queues running the SPEC92 benchmarks. We looked at pro...
ISCA
2007
IEEE
13 years 12 months ago
2007
IEEE
With increasing speed and power density, high-performance memories, including FB-DIMM (Fully Buffered DIMM) and DDR2 DRAM, now begin to require dynamic thermal management (DTM) a...
ICCAD
2003
IEEE
14 years 2 months ago
2003
IEEE
– Many embedded system designs usually impose (hard) read-time constraints on tasks. Thus, computing a tight upper bound of the worst case execution time (WCET) of a software is ...
SPDP
1991
IEEE
13 years 9 months ago
1991
IEEE
A number of experiments regarding the placement of instructions, private data and shared data in the Non-Uniform-Memory-Access multiprocessor, RP3 has been performed. Three Scient...