33 search results - page 6 / 7 » Meta-heuristics for Circuit Partitioning in Parallel Test Ge... |
DAC
2010
ACM
13 years 9 months ago
2010
ACM
Fault simulation is essential in test generation, design for test and reliability assessment of integrated circuits. Reliability analysis and the simulation of self-test structure...
ICCAD
2002
IEEE
14 years 2 months ago
2002
IEEE
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
DDECS
2007
IEEE
14 years 11 days ago
2007
IEEE
: As scan compression replaces the traditional scan it is important to understand how it works with power. DFT MAX represents one of the two primary scan compression solutions used...
EGPGV
2004
Springer
13 years 11 months ago
2004
Springer
We describe a system for the texture-based direct volume visualization of large data sets on a PC cluster equipped with GPUs. The data is partitioned into volume bricks in object ...
HPCA
2006
IEEE
14 years 6 months ago
2006
IEEE
As silicon technologies move into the nanometer regime, transistor reliability is expected to wane as devices become subject to extreme process variation, particle-induced transie...