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ASYNC
2004
IEEE
98views Hardware» more  ASYNC 2004»
13 years 10 months ago
Synthesis of Speed Independent Circuits Based on Decomposition
This paper presents a decomposition method for speedindependent circuit design that is capable of significantly reducing the cost of synthesis. In particular, this method synthesi...
Tomohiro Yoneda, Hiroomi Onda, Chris J. Myers
DATE
1999
IEEE
123views Hardware» more  DATE 1999»
13 years 10 months ago
An Algorithm for Face-Constrained Encoding of Symbols Using Minimum Code Length
Different logic synthesis tasks have been formulated as input encoding problems but restricted to use a minimum number of binary variables. This paper presents an original column ...
Manuel Martínez, Maria J. Avedillo, Jos&eac...
CHES
2006
Springer
205views Cryptology» more  CHES 2006»
13 years 10 months ago
Automated Design of Cryptographic Devices Resistant to Multiple Side-Channel Attacks
Balanced dynamic dual-rail gates and asynchronous circuits have been shown, if implemented correctly, to have natural and efficient resistance to side-channel attacks. Despite thei...
Konrad J. Kulikowski, Alexander B. Smirnov, Alexan...
ICCD
1997
IEEE
158views Hardware» more  ICCD 1997»
13 years 9 months ago
Practical Advances in Asynchronous Design
Asynchronous systems are being viewed as an increasingly viable alternative to purely synchronous systems. This paper gives an overview of the current state of the art in practica...
Erik Brunvand, Steven M. Nowick, Kenneth Y. Yun
TCAD
1998
82views more  TCAD 1998»
13 years 5 months ago
Structural methods for the synthesis of speed-independent circuits
Most existing tools for the synthesisof asynchronouscircuits from Signal Transition Graphs (STGs) derive the reachability graph for the calculation of logic equations. This paper ...
Enric Pastor, Jordi Cortadella, Alex Kondratyev, O...