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ISLPED
2007
ACM
75views Hardware» more  ISLPED 2007»
13 years 6 months ago
Minimizing power dissipation during write operation to register files
This paper presents a power reduction mechanism for the write operation in register files (RegFiles), which adds a conditional charge-sharing structure to the pair of complementar...
Kimish Patel, Wonbok Lee, Massoud Pedram
ICCD
2003
IEEE
121views Hardware» more  ICCD 2003»
14 years 1 months ago
Distributed Reorder Buffer Schemes for Low Power
We consider several approaches for reducing the complexity and power dissipation in processors that use separate register file to maintain the commited register values. The first ...
Gurhan Kucuk, Oguz Ergin, Dmitry Ponomarev, Kanad ...
MICRO
2003
IEEE
143views Hardware» more  MICRO 2003»
13 years 10 months ago
VSV: L2-Miss-Driven Variable Supply-Voltage Scaling for Low Power
Energy-efficient processor design is becoming more and more important with technology scaling and with high performance requirements. Supply-voltage scaling is an efficient way to...
Hai Li, Chen-Yong Cher, T. N. Vijaykumar, Kaushik ...