30 search results - page 2 / 6 » Mixed Formal Specifications with PVS |
ASE
2002
13 years 4 months ago
2002
This paper describes a specialized interface to PVS called TAME (Timed Automata Modeling Environment) which provides automated support for proving properties of I/O automata. A maj...
FAC
2008
13 years 5 months ago
2008
This paper describes how the communication protocol of Mondex electronic purses can be specified and verified against desired security properties. The specification is developed by...
DATE
1999
IEEE
1999
IEEE
Accounting for Various Register Allocation Schemes During Post-Synthesis Verification of RTL Designs
13 years 9 months ago
This paper reports a formal methodology for verifying a broad class of synthesized register-transfer-level (RTL) designs by accommodating various register allocation/optimization ...
ICSE
2008
IEEE-ACM
14 years 5 months ago
2008
IEEE-ACM
Timed Interval Calculus (TIC) is a highly expressive set-based notation for specifying and reasoning about embedded real-time systems. However, it lacks mechanical proving support...
APSEC
2001
IEEE
13 years 8 months ago
2001
IEEE
Formal specifications are now widely accepted in software development. Recently, the need for a separation of concerns with reference to static and dynamic aspects appeared. Furth...