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DAC
1999
ACM
10 years 5 months ago
Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications
Dual threshold technique has been proposed to reduce leakage power in low voltage and low power circuits by applying a high threshold voltage to some transistors in non-critical p...
Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye,...
ISLPED
1997
ACM
91views Hardware» more  ISLPED 1997»
10 years 4 months ago
Fully depleted CMOS/SOI device design guidelines for low power applications
In this paper we report the fully depleted CMOS/SOI device design guidelines for low power applications. Optimal technology, device and circuit parameters are discussed and compar...
Srinivasa R. Banna, Philip C. H. Chan, Mansun Chan...
ISLPED
1998
ACM
155views Hardware» more  ISLPED 1998»
10 years 5 months ago
Low threshold CMOS circuits with low standby current
Multi-Voltage CMOS MVCMOS is a design methodology for very low power supply voltages that uses low-threshold transistors in series with the supply rails. The control voltages on...
Mircea R. Stan
CORR
2008
Springer
117views Education» more  CORR 2008»
10 years 26 days ago
Design, Fabrication and Characterization of a Piezoelectric Microgenerator Including a Power Management Circuit
We report in this paper the design, fabrication and experimental characterization of a piezoelectric MEMS microgenerator. This device scavenges the energy of ambient mechanical vi...
M. Marzencki, Yasser Ammar, S. Basrour
ICCD
2000
IEEE
137views Hardware» more  ICCD 2000»
10 years 5 months ago
Skewed CMOS: Noise-Immune High-Performance Low-Power Static Circuit Family
In this paper; we present a noise-immune highperformance static circuit family suitable for low-voltage operation called skewed logic. Skewed logic circuits, in comparison with Do...
Alexandre Solomatnikov, Kaushik Roy, Cheng-Kok Koh...
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