9 search results - page 2 / 2 » Model checking a cache coherence protocol of a Java DSM impl... |
ASPLOS
1996
ACM
13 years 9 months ago
1996
ACM
This paper describes Shasta, a system that supports a shared address space in software on clusters of computers with physically distributed memory. A unique aspect of Shasta compa...
CAL
2010
13 years 1 months ago
2010
Memory models like SC, TSO, and PC enforce load-load ordering, requiring that loads from any single thread appear to occur in program order to all other threads. Out-of-order execu...
PLDI
2010
ACM
13 years 10 months ago
2010
ACM
Multithreaded programs are notoriously prone to race conditions, a problem exacerbated by the widespread adoption of multi-core processors with complex memory models and cache coh...
MICRO
2009
IEEE
13 years 11 months ago
2009
IEEE
Hardware support for dynamic analysis can minimize the performance overhead of useful applications such as security checks, debugging, and profiling. To eliminate implementation ...