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» Modeling Cache Effects at the Transaction Level
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SPAA
2009
ACM
14 years 5 months ago
NZTM: nonblocking zero-indirection transactional memory
This workshop paper reports work in progress on NZTM, a nonblocking, zero-indirection object-based hybrid transactional memory system. NZTM can execute transactions using best-eff...
Fuad Tabba, Mark Moir, James R. Goodman, Andrew W....
DATE
2006
IEEE
119views Hardware» more  DATE 2006»
13 years 11 months ago
Performance evaluation for system-on-chip architectures using trace-based transaction level simulation
The ever increasing complexity and heterogeneity of modern System-on-Chip (SoC) architectures make an early and systematic exploration of alternative solutions mandatory. Efficien...
Thomas Wild, Andreas Herkersdorf, Rainer Ohlendorf
IEEEPACT
1999
IEEE
13 years 9 months ago
The Effect of Program Optimization on Trace Cache Efficiency
Trace cache, an instruction fetch technique that reduces taken branch penalties by storing and fetching program instructions in dynamic execution order, dramatically improves inst...
Derek L. Howard, Mikko H. Lipasti
ICDE
1997
IEEE
136views Database» more  ICDE 1997»
14 years 6 months ago
Delegation: Efficiently Rewriting History
Transaction delegation, as introduced in ACTA, allows a transaction to transfer responsibility for the operations that it has performed on an object to another transaction. Delega...
Cris Pedregal Martin, Krithi Ramamritham
RTSS
2007
IEEE
13 years 11 months ago
Toward the Predictable Integration of Real-Time COTS Based Systems
The integration phase of real-time COTS-based systems is often problematic because when multiple tasks run concurrently, the interference at the bus level between cache fetching a...
Rodolfo Pellizzoni, Marco Caccamo