8 search results - page 2 / 2 » Modeling the Non-Linear Behavior of Library Cells for an Acc... |
DAC
2006
ACM
14 years 6 months ago
2006
ACM
A statistical model for the purpose of logic cell timing analysis in the presence of process variations is presented. A new current-based cell delay model is utilized, which can a...
VLSID
2004
IEEE
14 years 5 months ago
2004
IEEE
Abstract--In this paper, we present a new approach to calculate the steady state resistance values for CMOS library gates. These resistances are defined as simple equivalent models...
LCPC
2007
Springer
13 years 11 months ago
2007
Springer
Program dynamic optimization, adaptive to runtime behavior changes, has become increasingly important for both performance and energy savings. However, most runtime optimizations o...