6229 search results - page 1 / 1246 » Models of Computation for Networks on Chip |
ACSD
2006
IEEE
13 years 6 months ago
2006
IEEE
Networks on chip platforms offer the opportunity to introduce a new abstraction level that defines a set of platform services with performance and power characteristics. By making...
DAC
2010
ACM
13 years 6 months ago
2010
ACM
In this study, we propose the use of specialized influence models to capture the dynamic behavior of a Network-onChip (NoC). Our goal is to construct a versatile modeling framewor...
AINA
2009
IEEE
13 years 11 months ago
2009
IEEE
This paper presents a novel analytical model to compute communication latency of broadcast as the most fundamental collective communication operation. The novelty of the model lie...
AINA
2008
IEEE
13 years 11 months ago
2008
IEEE
—This work tries to derive ideas for thread allocation in Chip Multiprocessor (CMP)-based network processors performing general applications by Continuous-Time Markov Chain model...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
In this paper, we present a novel simulation approach for power grid network analysis. The new approach, called ETBR for extended truncated balanced realization, is based on model...