Sciweavers

2 search results - page 1 / 1
» Module Graph Merging and Placement to Reduce Reconfiguration...
Sort
View
FPL
2007
Springer
98views Hardware» more  FPL 2007»
13 years 6 months ago
Module Graph Merging and Placement to Reduce Reconfiguration Overheads in Paged FPGA Devices
Reconfiguration time in dynamically-reconfigurable modular systems can severely limit application run-time compared to the critical path delay. In this paper we present a novel ...
Shannon Koh, Oliver Diessel
FCCM
2008
IEEE
176views VLSI» more  FCCM 2008»
13 years 5 months ago
The Effectiveness of Configuration Merging in Point-to-Point Networks for Module-based FPGA Reconfiguration
Communications infrastructure for modular reconfiguration of FPGAs needs to support the changing communications interfaces of a sequence of modules. In order to avoid the overhead...
Shannon Koh, Oliver Diessel