16 search results - page 1 / 4 » Moguls: a model to explore the memory hierarchy for bandwidt... |
ISCA
2011
IEEE
12 years 8 months ago
2011
IEEE
In recent years, the increasing number of processor cores and limited increases in main memory bandwidth have led to the problem of the bandwidth wall, where memory bandwidth is b...
VLDB
2002
ACM
14 years 4 months ago
2002
ACM
Relational database systems have traditionally optimized for I/O performance and organized records sequentially on disk pages using the N-ary Storage Model (NSM) (a.k.a., slotted ...
QEST
2007
IEEE
13 years 10 months ago
2007
IEEE
Previous studies have shown that buffering packets in DRAM is a performance bottleneck. In order to understand the impediments in accessing the DRAM, we developed a detailed Petri...
DATE
2002
IEEE
13 years 9 months ago
2002
IEEE
In this paper, we investigate the benefits of a flexible, application-specific instruction set by adding a run-time Reconfigurable Functional Unit (RFU) to a VLIW processor. Preli...
PATMOS
2000
Springer
13 years 8 months ago
2000
Springer
Exploitation of data re-use in combination with the use of custom memory hierarchy that exploits the temporal locality of data accesses may introduce significant power savings, esp...