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» More Wires and Fewer LUTs: A Design Methodology for FPGAs
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FPGA
2003
ACM
138views FPGA» more  FPGA 2003»
13 years 10 months ago
Automatic transistor and physical design of FPGA tiles from an architectural specification
One of the most difficult and time-consuming steps in the creation of an FPGA is its transistor-level design and physical layout. Modern commercial FPGAs typically consume anywher...
Ketan Padalia, Ryan Fung, Mark Bourgeault, Aaron E...
VLSID
2004
IEEE
170views VLSI» more  VLSID 2004»
14 years 5 months ago
On-chip networks: A scalable, communication-centric embedded system design paradigm
As chip complexity grows, design productivity boost is expected from reuse of large parts and blocks of previous designs with the design effort largely invested into the new parts...
Jörg Henkel, Srimat T. Chakradhar, Wayne Wolf