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» Multi-clock path analysis using propositional satisfiability
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ASPDAC
2000
ACM
102views Hardware» more  ASPDAC 2000»
13 years 8 months ago
Multi-clock path analysis using propositional satisfiability
We present a satisfiability based multi-clock path analysis method. The method uses propositional satisfiability (SAT) in the detection of multi-clock paths. We show a method to re...
Kazuhiro Nakamura, Shinji Maruoka, Shinji Kimura, ...
CADE
2007
Springer
14 years 5 months ago
Predictive Labeling with Dependency Pairs Using SAT
This paper combines predictive labeling with dependency pairs and reports on its implementation. Our starting point is the method of proving termination of rewrite systems using se...
Adam Koprowski, Aart Middeldorp
CADE
2002
Springer
14 years 5 months ago
Lazy Theorem Proving for Bounded Model Checking over Infinite Domains
Abstract. We investigate the combination of propositional SAT checkers with domain-specific theorem provers as a foundation for bounded model checking over infinite domains. Given ...
Harald Rueß, Leonardo Mendonça de Mou...
EDCC
2005
Springer
13 years 10 months ago
PathCrawler: Automatic Generation of Path Tests by Combining Static and Dynamic Analysis
Abstract. We present the PathCrawler prototype tool for the automatic generation of test-cases satisfying the rigorous all-paths criterion, with a user-defined limit on the number...
Nicky Williams, Bruno Marre, Patricia Mouy, Muriel...
DATE
2000
IEEE
136views Hardware» more  DATE 2000»
13 years 9 months ago
On Applying Incremental Satisfiability to Delay Fault Testing
The Boolean satisfiability problem (SAT) has various applications in electronic design automation (EDA) fields such as testing, timing analysis and logic verification. SAT has bee...
Joonyoung Kim, Jesse Whittemore, Karem A. Sakallah...