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ICCAD
1994
IEEE
119views Hardware» more  ICCAD 1994»
13 years 7 months ago
Multi-level network optimization for low power
This paper describes a procedure for minimizing the power consumption in a boolean network under the zero delay model. Power is minimized by modifying the function of each interme...
Sasan Iman, Massoud Pedram
ISCAS
2007
IEEE
123views Hardware» more  ISCAS 2007»
13 years 10 months ago
Low-Power Low-Voltage Hot-Spot Tolerant Clocking with Suppressed Skew
— A methodology based on supply voltage optimization for lowering the power consumption and temperature fluctuations induced skew of clock distribution networks is proposed in th...
Sherif A. Tawfik, Volkan Kursun
VTC
2007
IEEE
13 years 10 months ago
Energy-Optimized Low-Complexity Control of Power and Rate in Clustered CDMA Sensor Networks with Multirate Constraints
—In this paper, we propose a low-complexity scheme for minimizing energy consumption in a clustered multirate CDMA sensor network with multiple receive antennas by jointly contro...
Chun-Hung Liu
ICCAD
2001
IEEE
201views Hardware» more  ICCAD 2001»
14 years 1 months ago
An Integrated Data Path Optimization for Low Power Based on Network Flow Method
Abstract: We propose an effective algorithm for power optimization in behavioral synthesis. In previous work, it has been shown that several hardware allocation/binding problems fo...
Chun-Gi Lyuh, Taewhan Kim, Chien-Liang Liu
ICCAD
2000
IEEE
188views Hardware» more  ICCAD 2000»
13 years 8 months ago
Bus Optimization for Low-Power Data Path Synthesis Based on Network Flow Method
— Sub-micron feature sizes have resulted in a considerable portion of power to be dissipated on the buses, causing an increased attention on savings for power at the behavioral l...
Sungpack Hong, Taewhan Kim