36 search results - page 1 / 8 » Multi-operand Floating-Point Addition |
ISLPED
1997
ACM
13 years 8 months ago
1997
ACM
Significand pre-alignment is a pre requisite for floating point additions. This paper1 addresses the architectural design and energy delay evaluation of a Low Power Barrel Switch ...
TC
2010
13 years 3 months ago
2010
—Due to the widespread use and inherent complexity of floating-point addition, much effort has been devoted to its speedup via algorithmic and circuit techniques. We propose a ne...
ARITH
2001
IEEE
13 years 8 months ago
2001
IEEE
ARITH
2005
IEEE
13 years 10 months ago
2005
IEEE
In this paper we propose an architecture for the computation of the double—precision floating—point multiply—add fused (MAF) operation A + (B × C) that permits to compute ...
CHARME
2001
Springer
13 years 8 months ago
2001
Springer
We report on the formal verification of the floating point unit used in the VAMP processor. The FPU is fully IEEE compliant, and supports denormals and exceptions in hardware. The ...