15 search results - page 1 / 3 » Multilevel global placement with retiming |
DAC
2003
ACM
14 years 5 months ago
2003
ACM
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous designs, this requires retiming and pipel...
ASPDAC
2004
ACM
13 years 10 months ago
2004
ACM
Delay minimization continues to be an important objective in the design of high-performance computing system. In this paper, we present an effective methodology to guide the delay...
ASPDAC
2007
ACM
13 years 8 months ago
2007
ACM
Abstract-- In this paper, we present FastPlace 3.0
DATE
2003
IEEE
13 years 9 months ago
2003
IEEE
We present a framework that considers global routing, repeater insertion, and flip-flop relocation for early interconnect planning. We formulate the interconnect retiming and ï¬...
ISPD
2012
ACM
12 years 4 days ago
2012
ACM
We propose a new multilevel framework for large-scale placement called MAPLE that respects utilization constraints, handles movable macros and guides the transition between global...