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SIGMETRICS
1997
ACM
117views Hardware» more  SIGMETRICS 1997»
13 years 9 months ago
Informed Multi-Process Prefetching and Caching
Informed prefetching and caching based on application disclosure of future I/O accesses (hints) can dramatically reduce the execution time of I/O-intensive applications. A recent ...
Andrew Tomkins, R. Hugo Patterson, Garth A. Gibson
ISCA
2000
IEEE
103views Hardware» more  ISCA 2000»
13 years 9 months ago
Piranha: a scalable architecture based on single-chip multiprocessing
The microprocessor industry is currently struggling with higher development costs and longer design times that arise from exceedingly complex processors that are pushing the limit...
Luiz André Barroso, Kourosh Gharachorloo, R...
QUESTA
2002
87views more  QUESTA 2002»
13 years 5 months ago
A Communication Multiplexer Problem: Two Alternating Queues with Dependent Randomly-Timed Gated Regime
Two random traffic streams are competing for the service time of a single server (multiplexer). The streams form two queues, primary (queue 1) and secondary (queue 0). The primary ...
Iddo Eliazar, Gadi Fibich, Uri Yechiali
ICDCS
1998
IEEE
13 years 9 months ago
Experience with Secure Multi-Processing in Java
As Java is the preferred platform for the deployment of network computers, it is appealing to run multiple applications on a single Java desktop. We experimented with using the Ja...
Dirk Balfanz, Li Gong
CODES
2005
IEEE
13 years 11 months ago
Conflict analysis in multiprocess synthesis for optimized system integration
This paper presents a novel approach for multiprocess synthesis supporting well-tailored module integration at system level. The goal is to extend the local scope of existing arch...
Oliver Bringmann, Wolfgang Rosenstiel, Axel Sieben...