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» New Results on Instruction Cache Attacks
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IMA
2007
Springer
132views Cryptology» more  IMA 2007»
13 years 11 months ago
New Branch Prediction Vulnerabilities in OpenSSL and Necessary Software Countermeasures
Abstract. Software based side-channel attacks allow an unprivileged spy process to extract secret information from a victim (cryptosystem) process by exploiting some indirect leaka...
Onur Aciiçmez, Shay Gueron, Jean-Pierre Sei...
ISLPED
1995
ACM
95views Hardware» more  ISLPED 1995»
13 years 8 months ago
Reducing the frequency of tag compares for low power I-cache design
In current processors, the cache controller, which contains the cache directory and other logic such as tag comparators, is active for each instruction fetch and is responsible fo...
Ramesh Panwar, David A. Rennels
EUROSYS
2010
ACM
13 years 9 months ago
Locating cache performance bottlenecks using data profiling
Effective use of CPU data caches is critical to good performance, but poor cache use patterns are often hard to spot using existing execution profiling tools. Typical profilers at...
Aleksey Pesterev, Nickolai Zeldovich, Robert T. Mo...
WSC
1997
13 years 6 months ago
Efficient Instruction Cache Simulation and Execution Profiling with a Threaded-Code Interpreter
We present an extension to an existing SPARC V8 instruction set simulator, SimICS, to support accurate profiling of branches and instruction cache misses. SimICS had previously su...
Peter S. Magnusson
CCS
2007
ACM
13 years 11 months ago
Yet another MicroArchitectural Attack: : exploiting I-Cache
Abstract. MicroArchitectural Attacks (MA), which can be considered as a special form of SideChannel Analysis, exploit microarchitectural functionalities of processor implementation...
Onur Aciiçmez