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» Noise considerations in circuit optimization
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ICCAD
1998
IEEE
94views Hardware» more  ICCAD 1998»
13 years 8 months ago
Noise considerations in circuit optimization
Noise can cause digital circuits to switch incorrectly and thus produce spurious results. Noise can also have adverse power, timing and reliability e ects. Dynamic logic is partic...
Andrew R. Conn, Ruud A. Haring, Chandramouli Viswe...
ISQED
2009
IEEE
137views Hardware» more  ISQED 2009»
13 years 10 months ago
Active decap design considerations for optimal supply noise reduction
Active decoupling capacitors (decaps) are more effective than passive decaps at reducing local IR-drop problems in the power distribution network. In the basic active decap, two p...
Xiongfei Meng, Resve A. Saleh
GLOBECOM
2008
IEEE
13 years 10 months ago
Optimal Front-End Design for MIMO Receivers
—The effect of antenna mutual coupling on fading correlation in compact MIMO arrays has received considerable attention. By contrast, relatively little attention has been paid to...
Carlo P. Domizioli, Brian L. Hughes, Kevin G. Gard...
DAC
2007
ACM
14 years 4 months ago
Placement of 3D ICs with Thermal and Interlayer Via Considerations
Thermal problems and limitations on interlayer via densities are important design constraints on three-dimensional integrated circuits (3D ICs), and need to be considered during g...
Brent Goplen, Sachin S. Sapatnekar
DAC
1996
ACM
13 years 7 months ago
Design Considerations and Tools for Low-voltage Digital System Design
Aggressive voltage scaling to 1V and below through technology, circuit, and architecture optimization has been proven to be the key to ultra low-power design. The key technology t...
Anantha Chandrakasan, Isabel Yang, Carlin Vieri, D...