138 search results - page 4 / 28 » Novel architecture for loop acceleration: a case study |
STTT
2008
13 years 5 months ago
2008
Abstract. Fast is a tool for the analysis of systems manipulating unbounded integer variables. We check safety properties by computing the reachability set of the system under stud...
CHES
2009
Springer
14 years 6 months ago
2009
Springer
Abstract. This paper is devoted to the design of fast parallel accelerators for the cryptographic Tate pairing in characteristic three over supersingular elliptic curves. We propos...
ISPASS
2010
IEEE
14 years 20 days ago
2010
IEEE
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
TVLSI
2002
13 years 5 months ago
2002
Abstract--Hardward/software (HW/SW) codesign and reconfigurable computing are commonly used methodologies for digitalsystems design. However, no previous work has been carried out ...
DDECS
2007
IEEE
14 years 3 days ago
2007
IEEE
—Current system-on-chip implementations integrate IP blocks from different vendors. Typical problems are incompatibility and integration overheads. This paper presents a case stu...