10 search results - page 1 / 2 » Novel binary linear programming for high performance clock m... |
ICCAD
2010
IEEE
13 years 2 months ago
2010
IEEE
Clock mesh is popular in high performance VLSI design because it is more robust against variations than clock tree at a cost of higher power consumption. In this paper, we propose ...
ICCAD
2010
IEEE
13 years 2 months ago
2010
IEEE
Clock network construction is one key problem in high performance VLSI design. Reducing the clock skew variation is one of the most important objectives during clock network synthe...
DAC
2010
ACM
13 years 2 months ago
2010
ACM
Clock meshes are extremely effective at filtering clock skew from environmental and process variations. For this reason, clock meshes are used in most high performance designs. Ho...
DATE
1999
IEEE
13 years 8 months ago
1999
IEEE
This paper investigates retiming and clock skew scheduling for improving the tolerance of synchronous circuits to delay variations. It is shown that when both long and short paths...
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
－In high performance systems, process variations and fluctuations of operating environments have significant impact on the clock skew. Recently, hybrid structures of H-tree and m...